Alliance College of Engineering & Design in Collaboration with AMD Conducts Technical Seminar on ‘FPGA’s Industry Trends and Insights’
24 February, 2023
Department of Electronics and Communication Engineering of Alliance College of Engineering and Design, Alliance University organized a technical seminar on FPGA’s (Field Programmable Gate Arrays) Industry Trends and Insights - State of FPGA. The seminar emphasised on the current FPGA trends in industry and exposed the participants from various specialized branches to the essential knowledge, job scope, and practical insight into the electronic system design aspects. FPGAs are ICs that are reprogrammable as required. The circuitry inside an FPGA chip is not hard etched, unlike that of ASICs (Application-Specific Integrated Circuit) or graphics processing units (GPUs) and may be reprogrammed as needed. FPGAs have emerged as a popular choice for deep learning and machine learning applications due to their customizable nature, lower power consumption, and low latency offered. FPGAs are a suitable replacement for ASIC (application-specific integrated circuit) since they have these capabilities instead of needing a lot of design and manufacturing time.
The speaker for the seminar, Mr. Rohit Gopalkrishna has more than 15 years of industry experience in the semiconductor and electronic system design domain. He currently manages Xilinx’s portion of AMD business in India and reports to the Senior Director of Core Markets Group at AMD. He Leads a team to drive AMD business in India, including Defense, Aerospace, Industrial, Automotive, Test & Measurement, Wireless (5G), and a few other segments. He is also responsible to drive the distribution business for Adaptive and Embedded Computing Products in India and the Alliance Partnership Program & University Program in India. He gave complete insight into the need for a core job market, especially in semiconductor technology, and the lack of required manpower in this domain. He reiterated on Atmanirbhar Bharat, which translates to 'self-reliant India' or 'self-sufficient India', is a policy formulated by Prime Minister of India, Narendra Modi for making India ‘a bigger and more important part of the global economy’, pursuing policies that are efficient, competitive and resilient, and being self-sustaining and self-generating. The seminar also enlightened the participants about the start-up initiatives which need young minds to think of capitalizing on the opportunities as the Indian government always allocates huge budgets under this category.
Towards the closure of the seminar, the Department of Electronics and Communication Engineering organized a valedictory function on the value-added course conducted on ‘FPGA Development Exordium on Xilinx Vivado using VHDL’ students. The course’s aim was to prepare students for industry readiness and give them the exposure needed in the FPGA domain. The course was ideated by Dr. Reeba Korah, Interim Dean of ACED and, was designed and organised by Prof. Dr. G. Ramana Murthy, Professor and Dr. Sandeep Dhariwal, Associate Professor at ACED.